428 search results - page 31 / 86 » Validating High-Level Synthesis |
CORR
2006
Springer
13 years 11 months ago
2006
Springer
Research on performance, robustness, and evolution of the global Internet is fundamentally handicapped without accurate and thorough knowledge of the nature and structure of the c...
ICCAD
2001
IEEE
14 years 7 months ago
2001
IEEE
: This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufactu...
DATE
2005
IEEE
14 years 4 months ago
2005
IEEE
This paper presents the novel idea of multi-placement structures, for a fast and optimized placement instantiation in analog circuit synthesis. These structures need to be generat...
ISSS
2002
IEEE
14 years 3 months ago
2002
IEEE
Modeling for synthesis and modeling for simulation seem to be two competing goals in the context of C++-based modeling frameworks. One of the reasons is while most hardware system...
DAC
2006
ACM
14 years 12 months ago
2006
ACM
We address the problem of estimating controller delay from high-level specifications during behavioral synthesis. Typically, the critical path of a synthesised behavioral design g...