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» Validating High-Level Synthesis
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DATE
2003
IEEE
120views Hardware» more  DATE 2003»
14 years 4 months ago
SystemC-VHDL Co-Simulation and Synthesis in the HW Domain
Embedded systems design requires the development of complex HW modules to cope with the most stringent timing constraints of the specifications. This implies the need to update an...
Massimo Bombana, Francesco Bruschi
DAC
2008
ACM
15 years 10 min ago
Formal datapath representation and manipulation for implementing DSP transforms
We present a domain-specific approach to representing datapaths for hardware implementations of linear signal transform algorithms. We extend the tensor structure for describing l...
Franz Franchetti, James C. Hoe, Markus Püsche...
DAC
2003
ACM
14 years 12 months ago
Data communication estimation and reduction for reconfigurable systems
Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable d...
Adam Kaplan, Philip Brisk, Ryan Kastner
ICCAD
2003
IEEE
120views Hardware» more  ICCAD 2003»
14 years 8 months ago
RTL Power Optimization with Gate-Level Accuracy
Traditional RTL power optimization techniques commit transformations at the RTL based on the estimation of area, delay and power. However, because of inadequate power and delay in...
Qi Wang, Sumit Roy
CMMR
2007
Springer
114views Music» more  CMMR 2007»
14 years 5 months ago
A Network-Based Framework for Collaborative Development and Performance of Digital Musical Instruments
This paper describes the design and implementation of a framework designed to aid collaborative development of a digital musical instrument mapping layer1 . The goal was to create ...
Joseph Malloch, Stephen Sinclair, Marcelo M. Wande...