428 search results - page 6 / 86 » Validating High-Level Synthesis |
DAC
1999
ACM
14 years 10 months ago
1999
ACM
In this paper, we establish a theoretical framework for a new concept of scheduling called soft scheduling. In contrasts to the traditional schedulers referred as hard schedulers,...
ISSS
1997
IEEE
14 years 2 months ago
1997
IEEE
This paper presents a novel source-level dynamic analysis methodology and tool for High-Level Synthesis (HLS). It not only for the first time enables HLS to offer source-level de...
ASPDAC
2007
ACM
14 years 1 months ago
2007
ACM
- Most image processing applications are computationally intensive and data intensive. Reconfigurable hardware boards provide a convenient and flexible solution to speed up these a...
ISSS
1995
IEEE
14 years 1 months ago
1995
IEEE
In this paper we brie
y describe a set of designs that can serve as examples for High Level Synthesis (HLS) systems. The designs vary in complexity from simple behavioral nite st...
DSD
2010
IEEE
13 years 8 months ago
2010
IEEE
—We propose a parametrized memory template for applications with parallel for loops. The template’s parameters reflect important trade-offs made during system design. The temp...