42 search results - page 6 / 9 » Variable Input Delay CMOS Logic for Low Power Design |
ISQED
2009
IEEE
14 years 1 months ago
2009
IEEE
Modern CMOS manufacturing processes have significant variability, which necessitates guard banding to achieve reasonable yield. It is our thesis that variability should be addres...
ENGL
2007
13 years 7 months ago
2007
—In this paper we propose a gain-variable low noise amplifier (LNA) for low-voltage and low power WCDMA application. The LNA is designed based on a current-reused topology and a ...
CORR
2010
Springer
13 years 1 months ago
2010
Springer
Combinational or Classical logic circuits dissipate heat for every bit of information that is lost. Information is lost when the input vector cannot be recovered from its correspon...
VLSID
2009
IEEE
14 years 7 months ago
2009
IEEE
Abstract-- Single-ended static random access memory (SESRAM) is well known for their tremendous potential of low active power and leakage dissipations. In this paper, we present a ...
CSREAESA
2006
13 years 8 months ago
2006
- This paper presents an approach to obtain reduced hardware and/or delay for synthesizing logic functions using multiplexers. Replication of single control line multiplexer is use...