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» Variation-aware dynamic voltage frequency scaling
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DATE
2009
IEEE
101views Hardware» more  DATE 2009»
14 years 2 months ago
A monitor interconnect and support subsystem for multicore processors
Abstract— In many current SoCs, the architectural interface to onchip monitors is ad hoc and inefficient. In this paper, a new architectural approach which advocates the use of a...
Sailaja Madduri, Ramakrishna Vadlamani, Wayne Burl...
ISCAS
2002
IEEE
89views Hardware» more  ISCAS 2002»
14 years 15 days ago
Mapping the wavelet transform onto silicon: the dynamic translinear approach
In this paper, an analog implementation of the Wavelet Transform (WT) is presented. The circuit is based on the Dynamic Translinear (DTL) circuit technique and implements, by mean...
Sandro A. P. Haddad, Wouter A. Serdijn
MICRO
2003
IEEE
166views Hardware» more  MICRO 2003»
14 years 26 days ago
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pa...
ICCAD
2009
IEEE
171views Hardware» more  ICCAD 2009»
13 years 5 months ago
A hybrid local-global approach for multi-core thermal management
Multi-core processors have become an integral part of mainstream high performance computer systems. In parallel, exponentially increasing power density and packaging costs have ne...
Ramkumar Jayaseelan, Tulika Mitra
CODES
2009
IEEE
13 years 8 months ago
Efficient dynamic voltage/frequency scaling through algorithmic loop transformation
We present a novel loop transformation technique, particularly well suited for optimizing embedded compilers, where an increase in compilation time is acceptable in exchange for s...
Mohammad Ali Ghodrat, Tony Givargis