226 search results - page 5 / 46 » Variation-tolerant circuits: circuit solutions and technique... |
DATE
1998
IEEE
13 years 11 months ago
1998
IEEE
Partial Scan techniques have been widely accepted as an effective solution to improve sequential ATPG performance while keeping acceptable area and performance overheads. Several ...
DATE
2010
IEEE
14 years 13 days ago
2010
IEEE
—This paper proposes a circuit optimization approach that can ease the computational burden on the simulation-based circuit optimizers by leveraging simple design equations that ...
ATVA
2007
Springer
13 years 11 months ago
2007
Springer
Abstract. Symbolic Trajectory Evaluation (STE) is a powerful technique for hardware model checking. It is based on a 3-valued symbolic simulation, using 0,1 and X n"), where t...
DATE
2010
IEEE
13 years 7 months ago
2010
IEEE
The Monte Carlo (MC) simulation is a well-known solution to the statistical analysis of analog circuits in the presence of device mismatch. Despite MC's superior accuracy comp...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
With shrinking technology, the timing variation of a digital circuit is becoming the most important factor while designing a functionally reliable circuit. Gate sizing has emerged...