REX is a program that extracts parasitic resistance and capacitance values for nodes in VLSI layouts. REX also performs network serial and parallel simplifications. Two types of n...
Interactive tools to help users author plans or processes are essential in a variety of domains. KANAL helps users author sound plans by simulating them, checking for a variety of...
In this paper we present EDAT, a tool designed for the analysis of trace files from network simulations and experiments. The EDAT framework encapsulates analysis steps in extensib...
This paper proposes a novel HW/SW co-simulation approach that minimizes the impact on software designers. We propose a SystemC-based system that enables the software team to test ...
Juanjo Noguera, Luis Baldez, Narcis Simon, Lluis A...
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...