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SIGCSE
1999
ACM
193views Education» more  SIGCSE 1999»
14 years 18 hour ago
Cache conscious programming in undergraduate computer science
The wide-spread use of microprocessor based systems that utilize cache memory to alleviate excessively long DRAM access times introduces a new dimension in the quest to obtain goo...
Alvin R. Lebeck
DAC
2007
ACM
14 years 8 months ago
Trusted Hardware: Can It Be Trustworthy?
Processing and storage of confidential or critical information is an every day occurrence in computing systems. The trustworthiness of computing devices has become an important co...
Cynthia E. Irvine, Karl N. Levitt
MICRO
2009
IEEE
124views Hardware» more  MICRO 2009»
14 years 2 months ago
ZerehCache: armoring cache architectures in high defect density technologies
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
Amin Ansari, Shantanu Gupta, Shuguang Feng, Scott ...
MICRO
2007
IEEE
115views Hardware» more  MICRO 2007»
14 years 2 months ago
Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0
A significant part of future microprocessor real estate will be dedicated to L2 or L3 caches. These on-chip caches will heavily impact processor performance, power dissipation, a...
Naveen Muralimanohar, Rajeev Balasubramonian, Norm...
MTV
2007
IEEE
121views Hardware» more  MTV 2007»
14 years 2 months ago
Chico: An On-chip Hardware Checker for Pipeline Control Logic
The widening gap between CPU complexity and verification capability is becoming increasingly more salient. It is impossible to completely verify the functionality of a modern mic...
Andrew DeOrio, Adam Bauserman, Valeria Bertacco