584 search results - page 35 / 117 » Verification-Aware Microprocessor Design |
ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
Power consumption is a primary concern for microprocessor designers. Lowering the supply voltage of processors is one of the most effective techniques for improving their energy e...
ASYNC
2004
IEEE
13 years 11 months ago
2004
IEEE
De-synchronization appears as a new paradigm to automate the design of asynchronous circuits from synchronous netlists. This paper studies different protocols for de-synchronizatio...
IFIPPACT
1994
13 years 9 months ago
1994
: Advanced architectural features of microprocessors like instruction level parallelism and pipelined functional hardware units require code generation techniques beyond the scope ...
DAC
2001
ACM
14 years 8 months ago
2001
ACM
The interlock and forwarding logic is considered the tricky part of a fully-featured pipelined microprocessor and especially debugging these parts delays the hardware design proce...
ICCD
2001
IEEE
14 years 4 months ago
2001
IEEE
Lowering power consumption in microprocessors, whether used in portables or not, has now become one of the most critical design concerns. On-chip cache memories tend to occupy dom...