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» Verification-Aware Microprocessor Design
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ASYNC
2004
IEEE
102views Hardware» more  ASYNC 2004»
13 years 11 months ago
Non-Uniform Access Asynchronous Register Files
Register files of microprocessors have often been cited as performance bottlenecks and significant consumers of energy. The robust and modular nature of quasi-delay insensitive (Q...
David Fang, Rajit Manohar
CHES
2006
Springer
125views Cryptology» more  CHES 2006»
13 years 11 months ago
Implementing the Elliptic Curve Method of Factoring in Reconfigurable Hardware
A novel portable hardware architecture of the Elliptic Curve Method of factoring, designed and optimized for application in the relation collection step of the Number Field Sieve,...
Kris Gaj, Soonhak Kwon, Patrick Baier, Paul Kohlbr...
PACS
2000
Springer
132views Hardware» more  PACS 2000»
13 years 11 months ago
An Adaptive Issue Queue for Reduced Power at High Performance
Increasing power dissipation has become a major constraint for future performance gains in the design of microprocessors. In this paper, we present the circuit design of an issue ...
Alper Buyuktosunoglu, Stanley Schuster, David Broo...
DATE
2010
IEEE
147views Hardware» more  DATE 2010»
13 years 10 months ago
Detecting/preventing information leakage on the memory bus due to malicious hardware
An increasing concern amongst designers and integrators of military and defense-related systems is the underlying security of the individual microprocessor components that make up ...
Abhishek Das, Gokhan Memik, Joseph Zambreno, Alok ...
ISLPED
2010
ACM
158views Hardware» more  ISLPED 2010»
13 years 8 months ago
Temperature- and energy-constrained scheduling in multitasking systems: a model checking approach
The ongoing scaling of semiconductor technology is causing severe increase of on-chip power density and temperature in microprocessors. This has raised urgent requirement for both...
Weixun Wang, Xiaoke Qin, Prabhat Mishra