1093 search results - page 11 / 219 » Verifying VLSI Circuits |
GLVLSI
1999
IEEE
13 years 11 months ago
1999
IEEE
DFT
1997
IEEE
13 years 11 months ago
1997
IEEE
DATE
1999
IEEE
13 years 11 months ago
1999
IEEE
Estimating peak power involves optimization of the circuit's switching function. We propose genetic spot expansion and optimization in this paper to estimate tight peak power...
ISCAS
2006
IEEE
14 years 1 months ago
2006
IEEE
In this paper, we present analog VLSI implementation of a resonate-and-fire neuron (RFN) model, and then consider noise effects on its performance of signal detection. The RFN ci...
VLSID
2004
IEEE
14 years 7 months ago
2004
IEEE
This work presents a novel dynamic bias control technique to verify the circuit performance of the lowpower rail-to-rail input/output buffer amplifier, which can be operating in s...