1093 search results - page 14 / 219 » Verifying VLSI Circuits |
DFT
1999
IEEE
13 years 11 months ago
1999
IEEE
Integrated Circuit manufacturing complexities have resulted in decreasing product yields and reliabilities. This process has been accelerated with the advent of very deep sub-micr...
VLSID
2001
IEEE
14 years 7 months ago
2001
IEEE
In this paper we describe a hardware design method for memory and register arrays that allows the application of formal equivalence checking for comparing a high-level register tr...
DAC
1995
ACM
13 years 11 months ago
1995
ACM
—We survey state-of-the-art optimization methods that target low power dissipation in VLSI circuits. Optimizations at the circuit, logic, architectural and system levels are cons...
GLVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
ISQED
2006
IEEE
14 years 1 months ago
2006
IEEE
Due to aggressive technology scaling, VLSI circuits are becoming increasingly susceptible to transient errors caused by single-event-upsets (SEUs). In this paper, we introduce two...