1093 search results - page 153 / 219 » Verifying VLSI Circuits |
ICCAD
1999
IEEE
14 years 1 months ago
1999
IEEE
This paper considers the problem of determining an optimal clock skew schedule for a synchronous VLSI circuit. A novel formulation of clock skew scheduling as a constrained quadrat...
VLSID
2009
IEEE
14 years 9 months ago
2009
IEEE
Designing MOS decoupling capacitors (DECAPs) in nanotechnologies provides many challenges due to the existing trade-offs among transient time response behavior, area, and gate lea...
VLSID
2008
IEEE
14 years 9 months ago
2008
IEEE
In this work, for the first time, we present a physically based analytical threshold voltage model for omega gate silicon nanowire transistor. This model is developed for long cha...
VLSID
2002
IEEE
14 years 9 months ago
2002
IEEE
Directed test program-based verification or formal verification methods are usually quite ineffective on large cachecoherent, non-uniform memory access (CC-NUMA) multiprocessors b...
IPPS
1996
IEEE
14 years 1 months ago
1996
IEEE
A new VLSI architecture for real-time pipeline FFT processor is proposed. A hardware oriented radix-22 algorithm is derived by integrating a twiddle factor decomposition technique ...