1093 search results - page 162 / 219 » Verifying VLSI Circuits |
TCAD
2002
13 years 8 months ago
2002
Abstract--This paper presents a solution to the problem of performance-driven buffered routing tree generation for VLSI circuits. Using a novel bottom-up construction algorithm and...
TNN
2008
13 years 8 months ago
2008
Abstract--This paper investigates whether spike-timing-dependent plasticity (STDP) can minimize the effect of mismatch within the context of a depth-from-motion algorithm. To impro...
DATE
2008
IEEE
14 years 3 months ago
2008
IEEE
As levels of parallelism are becoming increasingly complex in multiprocessor architectures, GALS, and asynchronous circuits, methodologies and software tools are needed to verify ...
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
Abstract— This paper introduces a novel four-order system, which can generate one-directional (1-D) n−torus, twodirectional (2-D) n × m −torus, three-directional (3-D) n × ...
ISCAS
2006
IEEE
14 years 2 months ago
2006
IEEE
In this paper, we present a fast algorithm to derive the iiiharmonic distortion in fully balanced Gm- C filters. It is based on Vi i state-space modeling and decomposition of the f...