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» Verifying VLSI Circuits
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EH
2004
IEEE
115views Hardware» more  EH 2004»
14 years 16 days ago
Intrinsic Evolution of Digital-to-Analog Converters Using a CMOS FPTA Chip
The work presented here tackles the problem of designing a unipolar 6-bit digital-to-analog converter (DAC) with a voltage mode output by hardware evolution. Thereby a Field Progr...
Jörg Langeheine, Karlheinz Meier, Johannes Sc...
RSS
2007
119views Robotics» more  RSS 2007»
13 years 10 months ago
Fishbone Model for Belt Object Deformation
— A modeling method for representing belt object deformation is proposed. Deformation of belt objects such as film circuit boards or flexible circuit boards must be estimated f...
Hidefumi Wakamatsu, Eiji Arai, Shinichi Hirai
JSA
2002
130views more  JSA 2002»
13 years 8 months ago
Reconfigurable models of finite state machines and their implementation in FPGAs
This paper examines some models of FSMs that can be implemented in dynamically and statically reconfigurable FPGAs. They enable circuits for the FSMs to be constructed in such a wa...
Valery Sklyarov
VLSID
2006
IEEE
129views VLSI» more  VLSID 2006»
14 years 9 months ago
A Stimulus-Free Probabilistic Model for Single-Event-Upset Sensitivity
With device size shrinking and fast rising frequency ranges, effect of cosmic radiations and alpha particles known as Single-Event-Upset (SEU), Single-Eventtransients (SET), is a ...
Mohammad Gh. Mohammad, Laila Terkawi, Muna Albasma...
VLSID
2005
IEEE
139views VLSI» more  VLSID 2005»
14 years 9 months ago
Variable Input Delay CMOS Logic for Low Power Design
Modern digital circuits consist of logic gates implemented in the complementary metal oxide semiconductor (CMOS) technology. The time taken for a logic gate output to change after...
Tezaswi Raja, Vishwani D. Agrawal, Michael L. Bush...