1093 search results - page 179 / 219 » Verifying VLSI Circuits |
EUROCRYPT
2011
Springer
13 years 8 days ago
2011
Springer
An additively-homomorphic encryption scheme enables us to compute linear functions of an encrypted input by manipulating only the ciphertexts. We define the relaxed notion of a se...
DAC
2000
ACM
14 years 9 months ago
2000
ACM
We recently introduced symbolic timing simulation (STS) using data-dependent delays as a tool for verifying the timing of fullcustom transistor-level circuit designs, and for the ...
STOC
2002
ACM
14 years 9 months ago
2002
ACM
Secure multi-party computing, also called secure function evaluation, has been extensively studied in classical cryptography. We consider the extension of this task to computation...
ATVA
2004
Springer
14 years 2 months ago
2004
Springer
Many circuit designs need to follow some temporal rules. However, it is hard to express and verify them in the past. Therefore, a temporal assertion extension to Verilog, called Te...
ISCAS
1999
IEEE
14 years 1 months ago
1999
IEEE
This paper presents the design consideration of high order digital AZ modulators used as modulus controller for fractional-N frequency synthesizer. A third-order MASH structure (M...