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ISCAS
1999
IEEE

Reduced complexity, high performance digital delta-sigma modulator for fractional-N frequency synthesis

14 years 3 months ago
Reduced complexity, high performance digital delta-sigma modulator for fractional-N frequency synthesis
This paper presents the design consideration of high order digital AZ modulators used as modulus controller for fractional-N frequency synthesizer. A third-order MASH structure (MASH 1-2) is designed and implemented which allows for the input to operate over 75% of the input adder capacity. The number of the output levels is reduced to two bits. The circuit was verified through simulation, ASIC implementation and exhibits high potential for a gigahertz range, low-powermonolithicCMOS frequency synthesizer.
Lizhong Sun, Thierry Lepley, Franck Nozahic, Amaud
Added 03 Aug 2010
Updated 03 Aug 2010
Type Conference
Year 1999
Where ISCAS
Authors Lizhong Sun, Thierry Lepley, Franck Nozahic, Amaud Bellissant, Tad A. Kwasniewski, Bany Heim
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