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» Verifying VLSI Circuits
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DAC
2002
ACM
14 years 8 months ago
Combined BEM/FEM substrate resistance modeling
For present-day micro-electronic designs, it is becoming ever more important to accurately model substrate coupling effects. Basically, either a Finite Element Method (FEM) or a B...
Eelco Schrik, N. P. van der Meijs
ISLPED
2010
ACM
236views Hardware» more  ISLPED 2010»
13 years 7 months ago
Analysis and design of ultra low power thermoelectric energy harvesting systems
Thermal energy harvesting using micro-scale thermoelectric generators is a promising approach to alleviate the power supply challenge in ultra low power systems. In thermal energy...
Chao Lu, Sang Phill Park, Vijay Raghunathan, Kaush...
CRYPTO
2011
Springer
243views Cryptology» more  CRYPTO 2011»
12 years 7 months ago
Memory Delegation
We consider the problem of delegating computation, where the delegator doesn’t even know the input to the function being delegated, and runs in time significantly smaller than ...
Kai-Min Chung, Yael Tauman Kalai, Feng-Hao Liu, Ra...
RECONFIG
2008
IEEE
225views VLSI» more  RECONFIG 2008»
14 years 1 months ago
A Hardware Filesystem Implementation for High-Speed Secondary Storage
Platform FPGAs are capable of hosting entire Linuxbased systems including standard peripherals, integrated network interface cards and even disk controllers on a single chip. File...
Ashwin A. Mendon, Ron Sass
ISQED
2007
IEEE
127views Hardware» more  ISQED 2007»
14 years 1 months ago
Sensitivity Based Link Insertion for Variation Tolerant Clock Network Synthesis
Clock distribution is one of the key limiting factors in any high speed, sub-100nm VLSI design. Unwanted clock skews, caused by variation effects like manufacturing variations, po...
Joon-Sung Yang, Anand Rajaram, Ninghy Shi, Jian Ch...