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» Verifying VLSI Circuits
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DAC
1996
ACM
14 years 26 days ago
Symphony: A Simulation Backplane for Parallel Mixed-Mode Co-Simulation of VLSI Systems
In this paper we present an integrated simulation paradigm in which parallel mixed-mode co-simulation is accomplished by integrating sequential simulators in a software simulation ...
Antonio R. W. Todesco, Teresa H. Y. Meng
DT
2007
57views more  DT 2007»
13 years 8 months ago
Leakage Minimization Technique for Nanoscale CMOS VLSI
This paper proposes a new heuristic approach to determine the input pattern that minimizes leakage currents of nanometer CMOS circuits during sleep mode considering stack and fano...
Kyung Ki Kim, Yong-Bin Kim, Minsu Choi, Nohpill Pa...
ISCAS
2003
IEEE
106views Hardware» more  ISCAS 2003»
14 years 2 months ago
A neuromorphic sound localizer for a smart MEMS system
In this paper we present an analog circuit that determines the direction of incoming sound using two microphones. The circuit is inspired by biology and uses two silicon cochlea to...
André van Schaik, Shihab Shamma
ASPDAC
1999
ACM
168views Hardware» more  ASPDAC 1999»
14 years 1 months ago
An Integrated Battery-Hardware Model for Portable Electronics
- We describe an integrated model of the hardware and the battery sub-systems in batterypowered VLSI systems. We demonstrate that, under this model and for a fixed operating voltag...
Massoud Pedram, Chi-Ying Tsui, Qing Wu
ITC
2002
IEEE
99views Hardware» more  ITC 2002»
14 years 1 months ago
Verifying Properties Using Sequential ATPG
This paper develops a novel approach for formally verifying both safety and liveness properties of designs using sequential ATPG tools. The properties are automatically mapped int...
Jacob A. Abraham, Vivekananda M. Vedula, Daniel G....