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DAC
1996
ACM
14 years 27 days ago
iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips
In this paper, we present the rst chip-level electrothermal simulator, iCET. For a given chip layout, packaging material, user-speci ed input signal patterns, and thermal boundar...
Yi-Kan Cheng, Chin-Chi Teng, Abhijit Dharchoudhury...
DATE
2002
IEEE
69views Hardware» more  DATE 2002»
14 years 1 months ago
Verifying Clock Schedules in the Presence of Cross Talk
This paper addresses verifying the timing of circuits containing level-sensitive latches in the presence of cross talk. We show that three consecutive periodic occurrences of the ...
Soha Hassoun, Eduardo Calvillo-Gámez, Chris...
GLVLSI
1999
IEEE
86views VLSI» more  GLVLSI 1999»
14 years 1 months ago
Self-Assembly Based Approaches for Metal/Molecule/Semiconductor Nanoelectronic Circuits
David B. Janes, R. P. Andres, E. H. Chen, J. Dicke...
EAAI
2006
189views more  EAAI 2006»
13 years 8 months ago
Evolutionary algorithms for VLSI multi-objective netlist partitioning
The problem of partitioning appears in several areas ranging from VLSI, parallel programming, to molecular biology. The interest in finding an optimal partition especially in VLSI ...
Sadiq M. Sait, Aiman H. El-Maleh, Raslan H. Al-Aba...
ISVLSI
2008
IEEE
117views VLSI» more  ISVLSI 2008»
14 years 3 months ago
In Situ Design of Register Operations
We present methods to design programs or electronic circuits, for performing any operation on k registers of any sizes in a processor, in such a way that one uses no other working...
Serge Burckel, Emeric Gioan