222 search results - page 16 / 45 » Verifying an Arbiter Circuit |
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
— This paper proposes a novel nonlinear modulating function approach for generating n−scroll chaotic attractors based on a general jerk circuit. The systematic nonlinear modula...
ISCAS
2002
IEEE
14 years 26 days ago
2002
IEEE
On-chip ESD protection circuits realized with novel diode structures without the field-oxide boundary across the p/n junction are proposed. A PMOS (NMOS) is especially inserted in...
DAC
1996
ACM
14 years 2 days ago
1996
ACM
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
CCECE
2011
IEEE
12 years 8 months ago
2011
IEEE
A mode-matching approach is presented for the analysis of substrate-integrated waveguide (SIW) circuits. The numerical technique takes advantage of recently developed fabrication ...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and method...