222 search results - page 23 / 45 » Verifying an Arbiter Circuit |
DAC
1998
ACM
14 years 9 months ago
1998
ACM
We describe the verification of the IM: a large, complex (12,000 gates and 1100 latches) circuit that detects and marks the boundaries between Intel architecture (IA-32) instructi...
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
VLSID
2004
IEEE
14 years 8 months ago
2004
IEEE
This work presents a novel dynamic bias control technique to verify the circuit performance of the lowpower rail-to-rail input/output buffer amplifier, which can be operating in s...
VLSID
1999
IEEE
14 years 7 days ago
1999
IEEE
This paper presents a detailed description of the application of a formal verification methodology to an ARM processor. The processor, a hybrid between the ARM7 and the StrongARM ...
ISPD
1998
ACM
14 years 5 days ago
1998
ACM
In this paper we present an input pattern independent method to compute the maximum current envelope, which is an upper bound over all possible current waveforms drawn by a circui...