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» Verifying an Arbiter Circuit
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ISCAS
1999
IEEE
100views Hardware» more  ISCAS 1999»
14 years 8 days ago
Reduced complexity, high performance digital delta-sigma modulator for fractional-N frequency synthesis
This paper presents the design consideration of high order digital AZ modulators used as modulus controller for fractional-N frequency synthesizer. A third-order MASH structure (M...
Lizhong Sun, Thierry Lepley, Franck Nozahic, Amaud...
ISCAS
1999
IEEE
131views Hardware» more  ISCAS 1999»
14 years 8 days ago
A multilevel modulation scheme for high-speed wireless infrared communications
To investigate short-distance, point-to-point, infrared channels, a test-bench and circuits were constructed to determine the limitations ofexisting optoelectronics. Theresults of...
S. Hranilovic, D. A. Johns
ACSD
1998
IEEE
90views Hardware» more  ACSD 1998»
14 years 7 days ago
Verification of Pipelined Microprocessors by Correspondence Checking in Symbolic Ternary Simulation
This paper makes the idea of memory shadowing [5] applicable to symbolic ternary simulation. Memory shadowing, an extension of Burch and Dill's pipeline verification method [...
Miroslav N. Velev, Randal E. Bryant
ATS
1998
IEEE
114views Hardware» more  ATS 1998»
14 years 7 days ago
Design and Simulation of a RISC-Based 32-bit Embedded On-Board Computer
This paper presents the design and simulation method for developing a RISC-based 32-bit embedded on-board computer. Instead of the conventional breadboarded prototype, (1) we used...
Zhen Guo, He Li, Shuling Guo, Dongsheng Wang
ICCAD
1998
IEEE
66views Hardware» more  ICCAD 1998»
14 years 7 days ago
Tight integration of combinational verification methods
Combinational verification is an important piece of most equivalence checking tools. In the recent past, many combinational verification algorithms have appeared in the literature...
Jerry R. Burch, Vigyan Singhal