222 search results - page 38 / 45 » Verifying an Arbiter Circuit |
TACAS
1998
Springer
14 years 6 days ago
1998
Springer
This paper enables symbolic ternary simulation of systems with large embedded memories. Each memory array is replaced with a behavioral model, where the number of symbolic variable...
DAC
1997
ACM
14 years 5 days ago
1997
ACM
Cr, As the complexity of high-performance microprocessor increases, functional verification becomes more and more difficult and RTL simulation emerges as the bottleneck of the des...
ICCAD
1996
IEEE
14 years 5 days ago
1996
IEEE
Functional simulation is the most widely used method for design verification. At various levels of abstraction, e.g., behavioral, register-transfer level and gate level, the design...
EURODAC
1994
IEEE
14 years 3 days ago
1994
IEEE
Abstract -- A general framework for synthesis of asynchronous control circuits at the state graph level is proposed. The framework can consider both concurrency reduction as well a...
ICCAD
1994
IEEE
14 years 3 days ago
1994
IEEE
Embedded computer systems are characterized by the presence of a dedicated processor and the software that runs on it. Power constraints are increasingly becoming the critical com...