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» Very Compact FPGA Implementation of the AES Algorithm
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CHES
2007
Springer
154views Cryptology» more  CHES 2007»
14 years 1 months ago
Multi-gigabit GCM-AES Architecture Optimized for FPGAs
Abstract. This paper presents a design-space exploration of the Galois/Counter Mode (GCM) algorithm with Advanced Encryption Standard (AES) as underlying block cipher for high thro...
Stefan Lemsitzer, Johannes Wolkerstorfer, Norbert ...
FPL
2007
Springer
94views Hardware» more  FPL 2007»
14 years 1 months ago
A Many-core Implementation based on the Reconfigurable Mesh Model
The reconfigurable mesh is a model for massively parallel computing for which many algorithms with very low complexity have been developed. These algorithms execute cycles of bus...
Heiner Giefers, Marco Platzner
CARDIS
1998
Springer
141views Hardware» more  CARDIS 1998»
13 years 11 months ago
The Block Cipher Rijndael
In this paper we present the block cipher Rijndael, which is one of the fifteen candidate algorithms for the Advanced Encryption Standard (AES). We show that the cipher can be impl...
Joan Daemen, Vincent Rijmen
FPL
2006
Springer
161views Hardware» more  FPL 2006»
13 years 11 months ago
Predictive Load Balancing for Interconnected FPGAs
A Field Programmable Gate Array (FPGA), when used as a platform for implementing special-purpose computing architectures, offers the potential for increased functional parallelism...
Jason D. Bakos, Charles L. Cathey, Allen Michalski
FPL
2004
Springer
144views Hardware» more  FPL 2004»
13 years 11 months ago
A Methodology for Energy Efficient FPGA Designs Using Malleable Algorithms
A recent trend towards integrating FPGAs with many heterogeneous components, such as memory systems, dedicated multipliers, etc., has made them an attractive option for implementin...
Jingzhao Ou, Viktor K. Prasanna