694 search results - page 16 / 139 » Visualisation Techniques for Users and Designers of Layout A... |
DAC
2003
ACM
14 years 8 months ago
2003
ACM
An efficient matrix solver is critical to the analytical placement. As the size of the matrix becomes huge, the multilevel methods turn out to be more efficient and more scalable....
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
High level synthesis transformations play a major part in shaping the properties of the final circuit. However, most optimizations are performed without much knowledge of the fina...
INFOVIS
1997
IEEE
13 years 12 months ago
1997
IEEE
We present the H3 layout technique for drawing large directed graphs as node-link diagrams in 3D hyperbolic space. We can lay out much larger structures than can be handled using ...
IV
2003
IEEE
14 years 27 days ago
2003
IEEE
This paper describes a radial layout method for displaying B+ -tree data structures. We present an algorithmic framework for computing the node positions that result in a planar d...
CDES
2006
13 years 9 months ago
2006
The ability to improve the yield of integrated circuits through layout modification has been recognized and several techniques for yield enhanced routing and compaction have been ...