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» Voltage Noise in Production Processors
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TVLSI
2002
121views more  TVLSI 2002»
13 years 7 months ago
On-chip decoupling capacitor optimization using architectural level prediction
Switching activity-generated power-supply grid-noise presents a major obstacle to the reduction of supply voltage in future generation semiconductor technologies. A popular techniq...
Mondira Deb Pant, Pankaj Pant, D. Scott Wills
CGO
2005
IEEE
14 years 1 months ago
SWIFT: Software Implemented Fault Tolerance
To improve performance and reduce power, processor designers employ advances that shrink feature sizes, lower voltage levels, reduce noise margins, and increase clock rates. Howev...
George A. Reis, Jonathan Chang, Neil Vachharajani,...
DSN
2005
IEEE
14 years 1 months ago
Engineering Over-Clocking: Reliability-Performance Trade-Offs for High-Performance Register Files
Register files are in the critical path of most high-performance processors and their latency is one of the most important factors that limit their size. Our goal is to develop er...
Gokhan Memik, Masud H. Chowdhury, Arindam Mallik, ...
ISCA
2000
IEEE
99views Hardware» more  ISCA 2000»
13 years 12 months ago
Transient fault detection via simultaneous multithreading
Smaller feature sizes, reduced voltage levels, higher transistor counts, and reduced noise margins make future generations of microprocessors increasingly prone to transient hardw...
Steven K. Reinhardt, Shubhendu S. Mukherjee
TDSC
2010
111views more  TDSC 2010»
13 years 5 months ago
Using Underutilized CPU Resources to Enhance Its Reliability
—Soft errors (or Transient faults) are temporary faults that arise in a circuit due to a variety of internal noise and external sources such as cosmic particle hits. Though soft ...
Avi Timor, Avi Mendelson, Yitzhak Birk, Neeraj Sur...