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ISLPED
2009
ACM
132views Hardware» more  ISLPED 2009»
14 years 2 months ago
Enabling ultra low voltage system operation by tolerating on-chip cache failures
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
ICCD
2007
IEEE
98views Hardware» more  ICCD 2007»
14 years 4 months ago
Evaluating voltage islands in CMPs under process variations
Parameter variations are a major factor causing powerperformance asymmetry in chip multiprocessors. In this paper, we analyze the effects of with-in-die (WID) process variations o...
Abhishek Das, Serkan Ozdemir, Gokhan Memik, Alok N...
IPPS
2007
IEEE
14 years 1 months ago
A Near-optimal Solution for the Heterogeneous Multi-processor Single-level Voltage Setup Problem
A heterogeneous multi-processor (HeMP) system consists of several heterogeneous processors, each of which is specially designed to deliver the best energy-saving performance for a...
Tai-Yi Huang, Yu-Che Tsai, Edward T.-H. Chu
MICRO
2003
IEEE
143views Hardware» more  MICRO 2003»
14 years 27 days ago
VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik ...
ISQED
2008
IEEE
119views Hardware» more  ISQED 2008»
14 years 2 months ago
Instruction Scheduling for Variation-Originated Variable Latencies
The advance in semiconductor technologies presents the serious problem of parameter variations. They affect threshold voltage of transistors and thus circuit delay also has variat...
Toshinori Sato, Shingo Watanabe