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ISPD
2005
ACM
130views Hardware» more  ISPD 2005»
14 years 3 months ago
Improved algorithms for link-based non-tree clock networks for skew variability reduction
In the nanometer VLSI technology, the variation effects like manufacturing variation, power supply noise, temperature etc. become very significant. As one of the most vital nets...
Anand Rajaram, David Z. Pan, Jiang Hu
ICALT
2003
IEEE
14 years 3 months ago
A Metadata Model for Capturing Presentations
This paper describes the design of a metadata model for capturing presentations developed as part of the VACE project (Video and Audio Capturing and Embedding). VACE is a modular,...
Ralf Einhorn, Stephan Olbrich, Wolfgang Nejdl
DAC
2006
ACM
14 years 3 months ago
Hierarchical power distribution and power management scheme for a single chip mobile processor
A hierarchical power distribution methodology that enables more than dozen power domains in a chip and a power management scheme using 20 power domains are described. This method ...
Toshihiro Hattori, Takahiro Irita, Masayuki Ito, E...
IPPS
1998
IEEE
14 years 2 months ago
NTI: A Network Time Interface M-Module for High-Accuracy Clock-Synchronization
This paper? provides a description of our Network Time Interface M-Module NTI supporting high-accuracy external clock synchronization by hardware. The NTI is built around our custo...
Martin Horauer, Ulrich Schmid, Klaus Schossmaier
IPPS
2002
IEEE
14 years 2 months ago
Efficient Pipelining of Nested Loops: Unroll-and-Squash
The size and complexity of current custom VLSI have forced the use of high-level programming languages to describe hardware, and compiler and synthesis technology bstract designs ...
Darin Petkov, Randolph E. Harr, Saman P. Amarasing...