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» Wireplanning in logic synthesis

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ISQED
2002
IEEE

103views Hardware» more ISQED 2002»

Synthesis of Selectively Clocked Skewed Logic Circuits

14 years 1 months ago

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Aiqun Cao, Naran Sirisantana, Cheng-Kok Koh, Kaush...

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APSEC
2000
IEEE

104views Software Engineering» more APSEC 2000»

A process logic for distributed system synthesis

14 years 26 days ago

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Yoshinao Isobe, Kazuhito Ohmaki

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ISPD
1997
ACM

78views Hardware» more ISPD 1997»

C5M - a control logic layout synthesis system for high-performance microprocessors

14 years 19 days ago

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Jeffrey L. Burns, Jack A. Feldman

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DAC
1994
ACM

92views Computer Architecture» more DAC 1994»

Layout Driven Logic Synthesis for FPGAs

14 years 16 days ago

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Shih-Chieh Chang, Kwang-Ting Cheng, Nam Sung Woo, ...

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DATE
2004
IEEE

114views Hardware» more DATE 2004»

Synthesis of Reversible Logic

14 years 5 days ago

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