Sciweavers

564 search results - page 87 / 113
» Wireplanning in logic synthesis
Sort
View
FM
2003
Springer
109views Formal Methods» more  FM 2003»
14 years 18 days ago
Certifying and Synthesizing Membership Equational Proofs
As the systems we have to specify and verify become larger and more complex, there is a mounting need to combine different tools and decision procedures to accomplish large proof ...
Grigore Rosu, Steven Eker, Patrick Lincoln, Jos&ea...
DATE
2002
IEEE
144views Hardware» more  DATE 2002»
14 years 11 days ago
Design Automation for Deepsubmicron: Present and Future
Advancing technology drives design technology and thus design automation EDA. How to model interconnect, how to handle degradation of signal integrity and increasing power densi...
Ralph H. J. M. Otten, Raul Camposano, Patrick Groe...
EH
2000
IEEE
156views Hardware» more  EH 2000»
13 years 11 months ago
Evolution of Analog Circuits on Field Programmable Transistor Arrays
Evolvable Hardware (EHW) refers to HW design and selfreconfiguration using evolutionary/genetic mechanisms. The paper presents an overview of some key concepts of EHW, describing ...
Adrian Stoica, Didier Keymeulen, Ricardo Salem Zeb...
ASPDAC
2007
ACM
129views Hardware» more  ASPDAC 2007»
13 years 11 months ago
ECO-system: Embracing the Change in Placement
In a realistic design flow, circuit and system optimizations must interact with physical aspects of the design. For example, improvements in timing and power may require replacing ...
Jarrod A. Roy, Igor L. Markov
DATE
2004
IEEE
144views Hardware» more  DATE 2004»
13 years 11 months ago
Smaller Two-Qubit Circuits for Quantum Communication and Computation
We show how to implement an arbitrary two-qubit unitary operation using any of several quantum gate libraries with small a priori upper bounds on gate counts. In analogy to librar...
Vivek V. Shende, Igor L. Markov, Stephen S. Bulloc...