85 search results - page 4 / 17 » Wiring edge-disjoint layouts |
VLSID
2004
IEEE
14 years 8 months ago
2004
IEEE
Reduction of worst-case delay and delay uncertainty due to capacitive coupling is a still unsolved problem in physical design. We describe a routing only layout solution - swizzli...
INTEGRATION
2002
13 years 7 months ago
2002
Booth Recoding is a commonly used technique to recode one of the operands in binary multiplication. In this way the implementation of a multipliers' adder tree can be improve...
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
To achieve minimum signal propagation delay, the nonuniform wire width routing architecture has been widely used in modern VLSI design. The non-uniform routing architecture exploi...
GLVLSI
2005
IEEE
14 years 1 months ago
2005
IEEE
Quantum-dot Cellular Automata (QCA) is a novel computing mechanism that can represent binary information based on spatial distribution of electron charge configuration in chemica...
ICCAD
2009
IEEE
13 years 5 months ago
2009
IEEE
This paper accurately considers wire short defects and proposes an algorithm to guarantee IC chip yield rate improvement for redundant wire insertion. Without considering yield ra...