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DAC
2006
ACM
14 years 10 months ago
Statistical logic cell delay analysis using a current-based model
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
Hanif Fatemi, Shahin Nazarian, Massoud Pedram
DATE
2008
IEEE
161views Hardware» more  DATE 2008»
14 years 4 months ago
Spatial Correlation Extraction via Random Field Simulation and Production Chip Performance Regression
Statistical timing analysis needs a priori knowledge of process variations. Lack of such a priori knowledge of process variations prevents accurate statistical timing analysis, fo...
Bao Liu
DAC
2004
ACM
14 years 1 months ago
Statistical gate delay model considering multiple input switching
There is an increased dominance of intra-die process variations, creating a need for an accurate and fast statistical timing analysis. Most of the recent proposed approaches assum...
Aseem Agarwal, Florentin Dartu, David Blaauw
DAC
2004
ACM
14 years 10 months ago
STAC: statistical timing analysis with correlation
Current technology trends have led to the growing impact of both inter-die and intra-die process variations on circuit performance. While it is imperative to model parameter varia...
Jiayong Le, Xin Li, Lawrence T. Pileggi
RECOMB
2008
Springer
14 years 10 months ago
Accurate Computation of Likelihoods in the Coalescent with Recombination Via Parsimony
Understanding the variation of recombination rates across a given genome is crucial for disease gene mapping and for detecting signatures of selection, to name just a couple of app...
Jotun Hein, Rune B. Lyngsø, Yun S. Song