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RTAS
1996
IEEE
13 years 10 months ago
Efficient worst case timing analysis of data caching
Recent progress in worst case timing analysis of programs has made it possible to perform accurate timing analysis of pipelined execution and instruction caching, which is necessa...
Sung-Kwan Kim, Sang Lyul Min, Rhan Ha
DAC
2003
ACM
14 years 7 months ago
Accurate timing analysis by modeling caches, speculation and their interaction
Schedulability analysis of real-time embedded systems requires worst case timing guarantees of embedded software performance. This involves not only language level program analysi...
Xianfeng Li, Tulika Mitra, Abhik Roychoudhury
MICRO
1998
IEEE
144views Hardware» more  MICRO 1998»
13 years 11 months ago
Analyzing the Working Set Characteristics of Branch Execution
To achieve highly accurate branch prediction, it is necessary not only to allocate more resources to branch prediction hardware but also to improve the understanding of branch exe...
Sangwook P. Kim, Gary S. Tyson
CASES
2006
ACM
13 years 10 months ago
Power efficient branch prediction through early identification of branch addresses
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
Chengmo Yang, Alex Orailoglu
ISSS
2002
IEEE
124views Hardware» more  ISSS 2002»
13 years 11 months ago
Timing Analysis of Embedded Software for Speculative Processors
Static timing analysis of embedded software is important for systems with hard real-time constraints. To accurately estimate time bounds, it is essential to model the underlying m...
Abhik Roychoudhury, Xianfeng Li, Tulika Mitra