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FPL
2003
Springer
161views Hardware» more  FPL 2003»
13 years 11 months ago
Laura: Leiden Architecture Research and Exploration Tool
At Leiden Embedded Research Center (LERC), we are building a tool chain called Compaan/Laura that allows us to map fast and efficiently applications written in Matlab onto recon...
Claudiu Zissulescu, Todor Stefanov, Bart Kienhuis,...
FAST
2011
12 years 10 months ago
Exploiting Half-Wits: Smarter Storage for Low-Power Devices
This work analyzes the stochastic behavior of writing to embedded flash memory at voltages lower than recommended by a microcontroller’s specifications to reduce energy consum...
Mastooreh Salajegheh, Yue Wang, Kevin Fu, Anxiao J...
IPPS
2006
IEEE
14 years 19 days ago
Hierarchically tiled arrays for parallelism and locality
Parallel programming is facilitated by constructs which, unlike the widely used SPMD paradigm, provide programmers with a global view of the code and data structures. These constr...
Jia Guo, Ganesh Bikshandi, Daniel Hoeflinger, Gheo...
HPCA
2012
IEEE
12 years 2 months ago
Improving write operations in MLC phase change memory
Phase change memory (PCM) recently has emerged as a promising technology to meet the fast growing demand for large capacity memory in modern computer systems. In particular, multi...
Lei Jiang, Bo Zhao, Youtao Zhang, Jun Yang 0002, B...
FPL
2004
Springer
205views Hardware» more  FPL 2004»
14 years 2 hour ago
A System Level Resource Estimation Tool for FPGAs
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
Changchun Shi, James Hwang, Scott McMillan, Ann Ro...