85 search results - page 8 / 17 » Wrong-path Instruction Prefetching |
HPCC
2009
Springer
14 years 2 days ago
2009
Springer
Usual cache optimisation techniques for high performance computing are difficult to apply in embedded VLIW applications. First, embedded applications are not always well structur...
ISLPED
2010
ACM
13 years 5 months ago
2010
ACM
Power has become the most critical design constraint for embedded handheld devices. This paper proposes a power-efficient SIMD architecture, referred to as Diet SODA, for DSP appl...
HPCA
2008
IEEE
14 years 7 months ago
2008
IEEE
Hard-to-predict branches depending on longlatency cache-misses have been recognized as a major performance obstacle for modern microprocessors. With the widening speed gap between...
IEEEINTERACT
2003
IEEE
14 years 22 days ago
2003
IEEE
Speculative pre-execution is a promising prefetching technique which uses an auxiliary assisting thread in addition to the main program flow. A prefetching thread (p-thread), whic...
CASES
2007
ACM
13 years 11 months ago
2007
ACM
Energy, power, and area efficiency are critical design concerns for embedded processors. Much of the energy of a typical embedded processor is consumed in the front-end since inst...