1000 search results - page 194 / 200 » Yield-Aware Cache Architectures |
MOBISYS
2009
ACM
14 years 8 months ago
2009
ACM
We design, implement, and evaluate a vehicular communication system that improves uplink connectivity through multi-lobe beam pattern switching on a smart antenna. Directionality ...
HPCA
2008
IEEE
14 years 8 months ago
2008
IEEE
Hard-to-predict branches depending on longlatency cache-misses have been recognized as a major performance obstacle for modern microprocessors. With the widening speed gap between...
HPCA
2007
IEEE
14 years 8 months ago
2007
IEEE
3D integration technology greatly increases transistor density while providing faster on-chip communication. 3D implementations of processors can simultaneously provide both laten...
HPCA
2005
IEEE
14 years 8 months ago
2005
IEEE
Improvements in semiconductor technology now enable Chip Multiprocessors (CMPs). As many future computer systems will use one or more CMPs and support shared memory, such systems ...
HPCA
2005
IEEE
14 years 8 months ago
2005
IEEE
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...