1000 search results - page 195 / 200 » Yield-Aware Cache Architectures |
HPCA
2004
IEEE
14 years 8 months ago
2004
IEEE
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
HPCA
2003
IEEE
14 years 8 months ago
2003
IEEE
Scalability of applications on distributed sharedmemory (DSM) multiprocessors is limited by communication overheads. At some point, using more processors to increase parallelism y...
HPCA
2001
IEEE
14 years 8 months ago
2001
IEEE
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
MOBIHOC
2008
ACM
14 years 7 months ago
2008
ACM
Recent research shows that significant energy saving can be achieved in wireless sensor networks with a mobile base station that collects data from sensor nodes via short-range co...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
In this paper, we propose a new architecture-level parameterized transient thermal behavioral modeling algorithm for emerging thermal related design and optimization problems for ...