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ICCD
2003
IEEE
112views Hardware» more  ICCD 2003»
14 years 4 months ago
Power Efficient Data Cache Designs
This paper investigates some power efficient data cache designs that try to significantly reduce the cache energy consumption, both static and dynamic, with a minimal impact in pe...
Jaume Abella, Antonio González
CAL
2007
13 years 7 months ago
Nahalal: Cache Organization for Chip Multiprocessors
— This paper addresses cache organization in Chip Multiprocessors (CMPs). We show that in CMP systems it is valuable to distinguish between shared data, which is accessed by mult...
Zvika Guz, Idit Keidar, Avinoam Kolodny, Uri C. We...
RTAS
1997
IEEE
13 years 12 months ago
OS-Controlled Cache Predictability for Real-Time Systems
3rd IEEE Real-time Technology and Applications Symposium (RTAS), June 1997 in Montreal, Canada Cache-partitioning techniques have been invented to make modern processors with an e...
Jochen Liedtke, Hermann Härtig, Michael Hohmu...
OTM
2004
Springer
14 years 1 months ago
A Time Predictable Instruction Cache for a Java Processor
Cache memories are mandatory to bridge the growing gap between CPU speed and main memory access time. Standard cache organizations improve the average execution time but are diffi...
Martin Schoeberl
ICCD
2002
IEEE
106views Hardware» more  ICCD 2002»
14 years 4 months ago
A Low Energy Set-Associative I-Cache with Extended BTB
This paper proposes a low-energy instruction-cache architecture, called history-based tag-comparison (HBTC) cache. The HBTC cache attempts to re-use tag-comparison results for avo...
Koji Inoue, Vasily G. Moshnyaga, Kazuaki Murakami