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IPPS
2000
IEEE
14 years 1 months ago
Register Assignment for Software Pipelining with Partitioned Register Banks
Many techniques for increasing the amount of instruction-level parallelism (ILP) put increased pressure on the registers inside a CPU. These techniques allow for more operations t...
Jason Hiser, Steve Carr, Philip H. Sweany, Steven ...
ISCA
2000
IEEE
134views Hardware» more  ISCA 2000»
14 years 1 months ago
Architectural support for scalable speculative parallelization in shared-memory multiprocessors
Speculative parallelization aggressively executes in parallel codes that cannot be fully parallelized by the compiler. Past proposals of hardware schemes have mostly focused on si...
Marcelo H. Cintra, José F. Martínez,...
ITC
2000
IEEE
101views Hardware» more  ITC 2000»
14 years 1 months ago
Which concurrent error detection scheme to choose ?
Concurrent error detection (CED) techniques (based on hardware duplication, parity codes, etc.) are widely used to enhance system dependability. All CED techniques introduce some ...
Subhasish Mitra, Edward J. McCluskey
ITCC
2000
IEEE
14 years 1 months ago
Projection-Based Multiuser Receiver over Frequency Selective Channels
In multiuser communication, the receiver’s performance is degraded by multiuser interference (MUI) as well as multipath distortions. This paper aims at elimination of these side...
Zhengyuan (Daniel) Xu
IV
2000
IEEE
74views Visualization» more  IV 2000»
14 years 1 months ago
Sequence World: A Genetics Database in Virtual Reality
Proper information visualization has always been viewed as an important tool for research. Traditionally, however, it was regarded as only a tool, with information content and vis...
Igor Rojdestvenski, David Modjeska, Fredrik Petter...