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ICCAD
1998
IEEE
95views Hardware» more  ICCAD 1998»
13 years 11 months ago
Efficient analog circuit synthesis with simultaneous yield and robustness optimization
This paper presents an efficient statistical design methodology that allows simultaneous sizing for performance and optimization for yield and robustness of analog circuits. The s...
Geert Debyser, Georges G. E. Gielen
ICCAD
1998
IEEE
120views Hardware» more  ICCAD 1998»
13 years 11 months ago
Communication synthesis for distributed embedded systems
Designers of distributed embedded systems face many challenges in determining the appropriate tradeoffs to make when defining a system architecture or retargeting an existing desi...
Ross B. Ortega, Gaetano Borriello
ICCL
1998
IEEE
13 years 11 months ago
Loop Optimization for Aggregate Array Computations
An aggregate array computation is a loop that computes accumulated quantities over array elements. Such computations are common in programs that use arrays, and the array elements...
Yanhong A. Liu, Scott D. Stoller
ICECCS
1998
IEEE
161views Hardware» more  ICECCS 1998»
13 years 11 months ago
A Method and a Technique to Model and Ensure Timeliness in Safety Critical Real-Time Systems
The main focus of this paper is the problem of ensuring timeliness in safety critical systems. First, we introduce a method and its associated technique to model both real-time ta...
Christophe Aussaguès, Vincent David
ICRA
1998
IEEE
142views Robotics» more  ICRA 1998»
13 years 11 months ago
Lagrangian Relaxation Neural Networks for Job Shop Scheduling
Abstract--Manufacturing scheduling is an important but difficult task. In order to effectively solve such combinatorial optimization problems, this paper presents a novel Lagrangia...
Peter B. Luh, Xing Zhao, Yajun Wang