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    DAC
    2002
    ACM
    148views Computer Architecture» more  DAC 2002»
    Deriving a simulation input generator and a coverage metric from a formal specification
    14 years 11 months ago
    Deriving a simulation input generator and a coverage metric from a formal specification
    Download  chicory.stanford.edu
    This paper presents novel uses of functional interface specifications for verifying RTL designs. We demonstrate how a simulation environment, a correctness checker, and a function...
    Kanna Shimizu, David L. Dill
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    DAC
    2002
    ACM
    116views Computer Architecture» more  DAC 2002»
    A factorization-based framework for passivity-preserving model reduction of RLC systems
    14 years 11 months ago
    A factorization-based framework for passivity-preserving model reduction of RLC systems
    Download  cobweb.ecn.purdue.edu
    We present a framework for passivity-preserving model reduction for RLC systems that includes, as a special case, the well-known PRIMA model reduction algorithm. This framework pr...
    Q. Su, Venkataramanan Balakrishnan, Cheng-Kok Koh
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    DAC
    2002
    ACM
    233views Computer Architecture» more  DAC 2002»
    A comparison of three verification techniques: directed testing, pseudo-random testing and property checking
    14 years 11 months ago
    A comparison of three verification techniques: directed testing, pseudo-random testing and property checking
    Download  www.cs.york.ac.uk
    This paper describes the verification of two versions of a bridge between two on-chip buses. The verification was performed just as the Infineon Technologies Design Centre in Bris...
    Mike Bartley, Darren Galpin, Tim Blackmore
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    DAC
    2002
    ACM
    81views Computer Architecture» more  DAC 2002»
    An optimal voltage synthesis technique for a power-efficient satellite application
    14 years 11 months ago
    An optimal voltage synthesis technique for a power-efficient satellite application
    Download  www.east.isi.edu
    This paper presents an optimal voltage synthesis technique for a satellite application to maximize system performance subject to energy budget. A period of a satellite's orbi...
    Dong-In Kang, Jinwoo Suh, Stephen P. Crago
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    DAC
    2002
    ACM
    136views Computer Architecture» more  DAC 2002»
    False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation
    14 years 11 months ago
    False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation
    Download  www.gigascale.org
    We propose a false-path-aware statistical timing analysis framework. In our framework, cell as well as interconnect delays are assumed to be correlated random variables. Our tool ...
    Jing-Jia Liou, Angela Krstic, Li-C. Wang, Kwang-Ti...
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