103 search results - page 5 / 21 » date 1999 |
DATE
1999
IEEE
14 years 3 months ago
1999
IEEE
This paper proposes a methodology to evaluate the effects of encodings on the power consumption of system-level buses in the presence of multi-level cache memories. The proposed m...
DATE
1999
IEEE
14 years 3 months ago
1999
IEEE
In this paper we show that the already known method of using multiplexers for making the inputs and outputs of the embedded blocks accessible by the primary ports of the Integrate...
DATE
1999
IEEE
14 years 3 months ago
1999
IEEE
As an at-speed solution to board-level interconnect testing, an enhanced boundary-scan architecture utilizing a combination of slightly modified boundary-scan cells and a user-def...
DATE
1999
IEEE
14 years 3 months ago
1999
IEEE
This paper presents a technique for glitch power minimization in combinational circuits. The total number of glitches is reduced by replacing some existing gates with functionally...
DATE
1999
IEEE
14 years 3 months ago
1999
IEEE
Complex signal processing algorithms are specified in floating point precision. When their hardware implementation requires fixed point precision, type refinement is needed. The p...