334 search results - page 31 / 67 » eXtended Block Cache |
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
Hardware transactional memory has great potential to simplify the creation of correct and efficient multithreaded programs, allowing programmers to exploit more effectively the s...
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
With growing capacities of flash memories, an efficient layer to manage read and write access to flash is required. NFTL is a widely used block based flash translation layer de...
FAST
2011
12 years 11 months ago
2011
Shared storage underlies most enterprise VM deployments because it is an established technology that administrators are familiar with and because it good job of protecting data. H...
MICRO
2006
IEEE
14 years 1 months ago
2006
IEEE
The large working sets of commercial and scientific workloads stress the L2 caches of Chip Multiprocessors (CMPs). Some CMPs use a shared L2 cache to maximize the on-chip cache c...
ISCA
2010
IEEE
14 years 21 days ago
2010
IEEE
Next generation tiled microarchitectures are going to be limited by off-chip misses and by on-chip network usage. Furthermore, these platforms will run an heterogeneous mix of ap...