— We describe an implementation of Gabor-type filters on field programmable gate arrays using the cellular neural network (CNN) architecture. The CNN template depends upon the ...
Ocean Y. H. Cheung, Philip Heng Wai Leong, Eric K....
The increasing demand for FPGAs and reconfigurable hardware targeting high performance low power applications has lead to an increasing requirement for new high performance reconf...
FPGA emulation has proven to be a performance effective method to analyse the behaviour of digital circuits in the presence of soft errors due to SEU effects. In particular, the r...
An improved FPGA implementation of an electronic cochlea filter is presented. We show that by using decimation, the computations of the electronic cochlea can be reduced. Furtherm...
Abstract. Current digital, directly mapped implementations of spiking neural networks use serial processing and parallel arithmetic. On a standard CPU, this might be the good choic...