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IJCNN
2006
IEEE
14 years 2 months ago
A Scalable FPGA Implementation of Cellular Neural Networks for Gabor-type Filtering
— We describe an implementation of Gabor-type filters on field programmable gate arrays using the cellular neural network (CNN) architecture. The CNN template depends upon the ...
Ocean Y. H. Cheung, Philip Heng Wai Leong, Eric K....
IPPS
2006
IEEE
14 years 2 months ago
A stochastic multi-objective algorithm for the design of high performance reconfigurable architectures
The increasing demand for FPGAs and reconfigurable hardware targeting high performance low power applications has lead to an increasing requirement for new high performance reconf...
Wing On Fung, Tughrul Arslan
IOLTS
2006
IEEE
102views Hardware» more  IOLTS 2006»
14 years 2 months ago
Emulation-based Fault Injection in Circuits with Embedded Memories
FPGA emulation has proven to be a performance effective method to analyse the behaviour of digital circuits in the presence of soft errors due to SEU effects. In particular, the r...
Mario García-Valderas, Marta Portela-Garc&i...
FPL
2006
Springer
169views Hardware» more  FPL 2006»
14 years 7 days ago
An FPGA-Based Electronic Cochlea with Dual Fixed-Point Arithmetic
An improved FPGA implementation of an electronic cochlea filter is presented. We show that by using decimation, the computations of the electronic cochlea can be reduced. Furtherm...
C. K. Wong, Philip Heng Wai Leong
ESANN
2006
13 years 10 months ago
Parallel hardware implementation of a broad class of spiking neurons using serial arithmetic
Abstract. Current digital, directly mapped implementations of spiking neural networks use serial processing and parallel arithmetic. On a standard CPU, this might be the good choic...
Benjamin Schrauwen, Jan M. Van Campenhout