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ASAP
2009
IEEE
159views Hardware» more  ASAP 2009»
14 years 2 months ago
A High-Performance Hardware Architecture for Spectral Hash Algorithm
—The Spectral Hash algorithm is one of the Round 1 candidates for the SHA-3 family, and is based on spectral arithmetic over a finite field, involving multidimensional discrete...
Ray C. C. Cheung, Çetin K. Koç, John...
SASP
2009
IEEE
238views Hardware» more  SASP 2009»
14 years 2 months ago
Hardware acceleration of multi-view face detection
—This paper presents a parallelized architecture for hardware acceleration of multi-view face detection. In our architecture, the multi-view face detection system generates rotat...
Junguk Cho, Bridget Benson, Ryan Kastner
FCCM
2009
IEEE
190views VLSI» more  FCCM 2009»
14 years 2 months ago
Optical Flow on the Ambric Massively Parallel Processor Array (MPPA)
The Ambric Massively Parallel Processor Array (MPPA) is a device that contains 336 32-bit RISC processors and is appropriate for embedded systems due to its relatively small physi...
Brad L. Hutchings, Brent E. Nelson, Stephen West, ...
DSD
2009
IEEE
141views Hardware» more  DSD 2009»
13 years 5 months ago
A Reconfigurable Frame Interpolation Hardware Architecture for High Definition Video
-- Since Frame Rate Up-Conversion (FRC) is started to be used in recent consumer electronics products like High Definition TV, real-time and low cost implementation of FRC algorith...
Ozgur Tasdizen, Ilker Hamzaoglu
ARC
2009
Springer
142views Hardware» more  ARC 2009»
14 years 2 months ago
A Hardware Analysis of Twisted Edwards Curves for an Elliptic Curve Cryptosystem
Abstract. This paper presents implementation results of a reconfigurable elliptic curve processor defined over prime fields GF(p). We use this processor to compare a new algorit...
Brian Baldwin, Richard Moloney, Andrew Byrne, Gary...