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FPL
2004
Springer
101views Hardware» more  FPL 2004»
14 years 1 months ago
Automatic Creation of Reconfigurable PALs/PLAs for SoC
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run -time reconfigurabil...
Mark Holland, Scott Hauck
FPL
2004
Springer
89views Hardware» more  FPL 2004»
14 years 1 months ago
HW/SW Co-design by Automatic Embedding of Complex IP Cores
Complex SoC and platform-based designs require integration of configurable IP cores from multiple sources. Even automatic compilation flows from a high-level description to HW/SW s...
Holger Lange, Andreas Koch
FPL
2004
Springer
98views Hardware» more  FPL 2004»
14 years 1 months ago
Power-Driven Design Partitioning
In order to enable efficient integration of FPGAs into cost effective and reliable high-performance systems as well potentially into low power mobile systems, their power efficienc...
Rajarshi Mukherjee, Seda Ogrenci Memik
FPL
2004
Springer
94views Hardware» more  FPL 2004»
14 years 1 months ago
Evaluating Fault Emulation on FPGA
Abstract. We present an evaluation of accelerating fault simulation by hardware emulation on FPGA. Fault simulation is an important subtask in test pattern generation and it is fre...
Peeter Ellervee, Jaan Raik, Valentin Tihhomirov, K...
FPL
2004
Springer
112views Hardware» more  FPL 2004»
14 years 1 months ago
Automating the Layout of Reconfigurable Subsystems via Template Reduction
When designing SoCs, a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be used. The inclusion o...
Shawn Phillips, Akshay Sharma, Scott Hauck