— Coupled oscillator networks occur in various domains such as biology, astrophysics and electronics. In this paper, we present a comprehensive procedure for rapid and accurate s...
— To save power consumption, it has been shown that the clock signal can be gated without changing the functionality under certain clock-gating conditions. We observe that the cl...
This paper presents ISCLEs, a novel and robust analog design method that promises to scale with Moore’s Law, by doing boosting-style importance sampling on digital-sized circuit...
The paper proposes an efficient terminal and model order reduction method for compact modeling of interconnect circuits with many terminals. The new method is inspired by the rece...
Pu Liu, Sheldon X.-D. Tan, Boyuan Yan, Bruce McGau...
Statistical static timing analysis (SSTA) has emerged as an essential tool for nanoscale designs. Monte Carlo methods are universally employed to validate the accuracy of the appr...