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ISCA
2010
IEEE
14 years 1 months ago
2010
IEEE
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
ISCA
2010
IEEE
14 years 16 days ago
2010
IEEE
As leakage and other charge storage limitations begin to impair the scalability of DRAM, non-volatile resistive memories are being developed as a potential replacement. Unfortunat...
ISCA
2010
IEEE
13 years 10 months ago
2010
IEEE
Two broad classes of memory models are available today: models with hardware cache coherence, used in conventional chip multiprocessors, and models that rely upon software to mana...
ISCA
2010
IEEE
13 years 10 months ago
2010
IEEE
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
ISCA
2010
IEEE
13 years 7 months ago
2010
IEEE
Practical cache replacement policies attempt to emulate optimal replacement by predicting the re-reference interval of a cache block. The commonly used LRU replacement policy alwa...