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VTS
2005
IEEE
84views Hardware» more  VTS 2005»
14 years 1 months ago
Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies
We present three resistive bridging fault models valid for different CMOS technologies. The models are partitioned into a general framework (which is shared by all three models) a...
Ilia Polian, Sandip Kundu, Jean Marc Galliè...
ISLPED
2005
ACM
68views Hardware» more  ISLPED 2005»
14 years 1 months ago
Two efficient methods to reduce power and testing time
Reducing power dissipation and testing time is accomplished by forming two clusters of don’t-care bit inside an input and a response test cube. New reordering scheme of scan lat...
Il-soo Lee, Tony Ambler
ICCSA
2005
Springer
14 years 1 months ago
A Parallel Tabu Search Algorithm for Optimizing Multiobjective VLSI Placement
Abstract. In this paper, we present a parallel tabu search (TS) algorithm for efficient optimization of a constrained multiobjective VLSI standard cell placement problem. The prima...
Mahmood R. Minhas, Sadiq M. Sait
DSD
2005
IEEE
96views Hardware» more  DSD 2005»
13 years 9 months ago
Improvement of the Fault Coverage of the Pseudo-Random Phase in Column-Matching BIST
Several methods improving the fault coverage in mixed-mode BIST are presented in this paper. The test is divided into two phases: the pseudo-random and deterministic. Maximum of f...
Peter Filter, Hana Kubatova
ISCA
2005
IEEE
134views Hardware» more  ISCA 2005»
14 years 1 months ago
A High Throughput String Matching Architecture for Intrusion Detection and Prevention
Network Intrusion Detection and Prevention Systems have emerged as one of the most effective ways of providing security to those connected to the network, and at the heart of alm...
Lin Tan, Timothy Sherwood